Models of on-chip coplanar transmission lines over a substrate have been developed as a part of the “T-lines set” which is the core of an interconnect-aware design and modeling methodology, enabling high predictability of the critical interconnect behavior. Further information is provided in references: Goren, D. et al., “An Interconnect-Aware Methodology for Analog and Mixed Signal Design, Based on High Bandwidth (Over 40 GHz) On-chip Transmission Line Approach” IEEE DATE '02 Conference, Paris March 2002, pp. 804-811 and Goren, D. et al., “On-chip Interconnect-Aware Design and Modeling Methodology, Based on High Bandwidth Transmission Line Devices”, IEEE DAC '03 Conference, CA, June 2003, pp. 724-727.
Currently supported production level coplanar transmission lines include single wire and two coupled wires as shown in the cross-sections of FIGS. 1A and 1B. The structures are symmetrical and include grounded side shield lines. The wires are close to each other and “thick” i.e. their width, the metal layer thickness and the gaps between the wires are of the same order. The metal wires are surrounded in cross-section by a surrounding material which is a dielectric, for example, an oxide dielectric. The surrounding material is supported by a substrate, for example, a silicon substrate.
As follows from hardware measurements and numerical studies of wideband behavior of on-chip coplanar transmission lines over a substrate which is conductive, a line capacitance per unit length strongly decreases with the frequency growth of the current in the wires. Although a lower substrate resistivity causes a slower capacitance decrease, the C(f) curves for different substrate resistance values tend to the same asymptotic values: a low frequency limit C0 and a high frequency limit C¥.
The surrounding material in which the wires are provided is assumed to be a dielectric which is a perfect insulator. The substrate is a material which has a finite electrical conductivity in addition to dielectric properties.
The permittivity e1 of the dielectric surrounding material does not depend on frequency, while the permittivity e2 of a conductive substrate is a complex quantity depending on the frequency f, such that at f=0 and at f=¥ it assumes real values. The substrate acts as a perfect conductor at low frequencies and as an ideal dielectric at very high frequencies. As a result of the frequency dependence of the substrate, the capacitance of the conductors is a function of frequency. A solution for arbitrary real permittivities e1 and e2 includes both C0 and C¥ as specific cases. Accurate computation of these asymptotical values has critical impact on the accuracy of a transmission line model in the whole bandwidth of interest.
There are several techniques for computing C0 which account for “thick” wires and result in explicit expressions yielding reasonable accuracy. However, the previous approaches to calculating C¥ either have used purely numeric approach, or have been based on very rough assumptions (such as assuming zero thickness of the wires) leading to large and unpredictable errors.
An Electro-Magnetic (EM) solver provides a numeric solution of Maxwell's equations for certain specific cases, characterized by geometry (2D or 3D) and frequency range (quasi-static or full wave solution method is chosen based on the required frequency range per geometry). The output includes electric and/or magnetic field distributions, and integral parameters (capacitance, inductance, S-parameters, impedance), etc. In any case, for each set of input parameters, the solution process includes a definition of the solution domain, dividing it into a mesh of N elementary cells, building and solving a system of k*N algebraic linear equations, k31. N has a variable order of magnitude, 102-106, depending on geometry and required accuracy.
The advantage of EM solvers is their high accuracy. Their disadvantages are very large computation time and memory usage, and extremely difficult integration with other tools, which prevents their usage in various solution flows/environments, e.g. chip design and simulation flow. Therefore, EM solvers are used mostly as stand-alone tools for verifying or fitting of other solutions which are integrated within the desired design flow or environment.
The aim of the present invention is to yield accurate explicit expressions for high frequency capacitance C¥ which account for “thick” rectangular wires. In particular, a method of modeling capacitance is provided for a structure such as on-chip coplanar transmission lines over a conductive substrate operated at very high frequencies such that the substrate behaves as a perfect dielectric.
There are specific cases of the relationship between the permittivities e1 and e2 of the surrounding material and the substrate in which capacitance is much easier to calculate. The core idea is to calculate the capacitance of a pair of long conductors for certain values of permittivity e1 and e2, based on a known capacitance computed for the same value of the permittivity e1 of the surrounding material and a different value of the permittivity e2 of the substrate.
The present invention uses the fact that at very high frequencies, the substrate behaves as a dielectric. Therefore, formulae can be suggested for computing the capacitance in the case of two different dielectrics as the surrounding material and the substrate. These formulae can then be used for modeling the desired high frequency capacitance.
The description presents a semi-analytical technique for modeling capacitance of on-chip coplanar transmission lines over a substrate. The focus is put on developing expressions for high frequency capacitance which yield reasonable accuracy. The technique is based on the two-dimensional approach and results in accurate and efficient expressions accounting for frequency dependent behavior of the substrate, as well as for actual transmission lines geometry.